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Let's work through these answers:
Outline why can’t we use only registers or cache for all memory.
Outline how do cache hits/misses affect performance.
Describe what happens when the CPU runs out of cache space.
Explain how RAM and ROM differ in usage and design.
We will cover:
A1.1.5 Describe the fetch, decode and execute cycle.
• The basic operations a CPU performs to execute a single instruction in machine language
• The interaction between memory and registers via the three buses: address, data, control